IFT 212: Computer Architecture and Organisation

Learning Outcomes
At the end of this course, students will be able to:

  1. explain the organisation of the classical von Neumann machine and its major functional
  2. construct simple assembly language programme segments;
  3. describe how fundamental high-level programming constructs are implemented at the
    machine-language level;
  4. discuss the concept of control points and the generation of control signals using hardwired
    or microprogrammed implementations;
  5. describe how the use of memory hierarchy (cache, virtual memory) is used to reduce the
    effective memory latency; and
  6. explain the concept of interrupts and describe how they are used to implement I/O control
    and data transfers.

    Course Contents
    Principles of computer hardware and instruction set architecture. Internal CPU organisation
    and implementation. Instruction format and types, memory, and I/O instructions. Dataflow,
    arithmetic, and flow control instructions, addressing modes, stack operations, and interrupts.
    Data path and control unit design. RTL, microprogramming and hardwired control. The
    practice of assembly language programming. Memory hierarchy. Cache memory, Virtual
    memory. Cache performance. Compiler support for cache performance. I/O organisations.

    Lab Work:
    Practical demonstration of the architecture of a typical computer. Illustration of
    different types of instructions and how they are executed. Simple Assembly Language
    programming. Demonstration of interrupts. Programming assignments to practice MS-DOS
    batch programming, Assembly Process, Debugging, Procedures, Keyboard input, Video
    Output, File and Disk I/O, and Data Structure. Demonstration of Reduced Instruction Set
    Computers. Illustration of parallel architectures and interconnection networks.